• SiP Production Flow
 
  • SiP Service & Design Flow
  • Feasibility study and potential cost saving estimation
  • Technical competitive SiP solution
    - Whole chips simulation environment with considering SiP RLC & timing
    - Chip DRC & SiP design from DFM consideration
    - Chip pad layout optimization to match existing memory or analog chips
    - DFT & BIST development
  • Total solution service from chip implementation, SiP package design, & final testing development to production service by tier one partners
 
  • Selected SiP Product Example
  T-Con Application
 Description
Product
Characteristics		 - Stack die SiP - TSMC 90nm Generic Process,1P7M
- Stack die SiP, ASIC/MDDR
- PCI-E
Service
Highlights		 - SDRAM evaluation
- ASIC/SDRAM SiP design
- Skew lot for product window tuning
- Test H/W design and preparation
- Component level qualification

- Complex SiP design
- Frequency / time domain simulation for high speed signal
integrity
- High speed I/F test solution
- Thermal simulation
- PI/SI for L/B design
Status - Production (>5Mpcs) - Package design completed
- Electrical simulation completed
Package
Cross Section
     
   
 
SiP Application
  • Handheld & Portable Devices
  • PC Peripheral
  • Storage Card
  • Networking
  • SiP Success Story
Project Application KGD PKG Status
A T-Con 2Mx32 LQFP
 Production
B T-Con 1Mx16
 LQFP
 Production
C IR camera 1Mx16
 LFBGA
 Production
D Car camera 1Mx16
 TFBGA Production
E Multimedia platform 4Mx32,1-Phy LFBGA Qualification
F Network 8x256M, 219 passives FCBGA
 Production
G Car camera 1Mx32,1-Rx,1-Tx
 LFBGA Qualification
H Cell phone 1-RF 20-Passive TFBGA Pilot
I Multimedia application 2-256M MDDR
 LFBGA Pilot
J Car camera SDRAM, Tx, Rx LFBGA Pilot
K Cell phone RF TFBGA
 Pilot
L Mobile TV SDRAM TFBGA
 Pilot
         
 
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