Design Methodology

GUC integrates commercial EDA and in-house solution to make sure design quality and efficiency.

  • Code purification and coverage analysis
  • Topographic Synthesis
  • DFT integration platform
  • IP integration/IP quality checking methodology
  • Multi-level hierarchical design and implementation methodology
  • PowerMagic® low power methodology
  • DFM advisor - CMP/LPC analysis and fixing
  • High-speed IP testing methodology
  • 2.5D Interposer methodology
  • One Pass Implementation platform
  • Dynamic IR, SI and timing aware implementation
  • OCV (On Chip Variation) analysis and prevention methodology
  • Multiple RC analysis and prevention methodology

 

 

Efficient Chip Implementation Platform