Today's complex SoC designs turn to high speed interfaces to provide chip-to-chip or chip-to-device high volume data transmission. Physical layer IP for analog signal processing and controller IP that support specific protocols are just as important to the SoC designer who integrate digital logic into their ASICs.
GUC's digital IP family provides a broad range of controller IP that support key interface protocols, including USB2.0/3.0/3.1, PCIe2/3/4, DDR2/3/4, LPDDR2/3/4, and display port, MIPI unipro, and UFS2.0.
The GUC digital IP family and GUC high speed interface PHY IP are production proven, having established a significant mass production track record that demonstrates testability and reliability. Along with its own PHY IP, GUC has also verified interoperability with PHY IP from partners like M31, whose USB3.0 PHY has passed USB-IF USB3.0 logo certification.
Due in part to its long term commitment to digital IP development, GUC controller IP has been adopted across a wide spectrum of applications including smart phones, tablets, TVs, set-top boxes, cameras, modems, game consoles, PCs, and telecommunications equipment.
GUC augments its extensive in-house digital IP catalog by collaborating with IP partners like PLDA, Synopsys or Renesas to satisfy virtually every design preference. This Solution Guide lists Renesas digital IP that have been verified in GUC ASIC projects and either interoperates with GUC PHY IP or with other 3rd party PHY IP.